Module registers 

In-memory bootstrap register map and embedded GenApi XML.

Register Address Map

Address	Length	Feature	Type
0x0000	4	Version (RO)	u32 BE
0x0004	4	DeviceMode (RO)	u32 BE
0x0008	4	DeviceMACAddressHigh (RO)	u32 BE
0x000c	4	DeviceMACAddressLow (RO)	u32 BE
0x0010	4	SupportedIPConfiguration (RO)	u32 BE
0x0014	4	CurrentIPConfiguration	u32 BE
0x0024	4	CurrentIPAddress (RO)	IPv4
0x0034	4	CurrentSubnetMask (RO)	IPv4
0x0044	4	CurrentDefaultGateway (RO)	IPv4
0x0900	4	GevNumberOfMessageChannels (RO)	u32 BE
0x0904	4	GevNumberOfStreamChannels (RO)	u32 BE
0x0a00	4	CCP (Control Channel Privilege)	u32 BE
0x0938	4	Heartbeat Timeout	u32 BE
0x0b00	4	GevMCP (message channel port)	u32 BE
0x0b10	4	GevMCDA (message channel addr)	u32 BE
0x0d00+	varies	Stream Channel 0 registers	u32 BE
0x20000	4	Width	u32 BE
0x20004	4	Height	u32 BE
0x20008	4	PixelFormat	u32 BE
0x2000c	4	OffsetX	u32 BE
0x20010	4	OffsetY	u32 BE
0x20014	4	SensorWidth (RO)	u32 BE
0x20018	4	SensorHeight (RO)	u32 BE
0x20020	4	AcquisitionMode	u32 BE
0x20024	4	AcquisitionStart (command)	u32 BE
0x20028	4	AcquisitionStop (command)	u32 BE
0x2002c	4	AcquisitionFrameRate	f32→u32
0x20030	8	ExposureTime	f64 BE
0x20038	4	ExposureAuto	u32 BE
0x20040	8	Gain	f64 BE
0x20048	4	GainAuto	u32 BE
0x20050	4	BlackLevel	u32 BE
0x20054	4	AcquisitionFrameRateEnable	u32 BE
0x20058	4	SensorType	u32 BE
0x20060	4	GevTimestampTickFrequency (RO)	u32 BE
0x20068	8	GevTimestampValue (RO)	u64 BE
0x20070	4	TimestampLatch (command)	u32 BE
0x20078	8	GevIEEE1588OffsetFromMaster…	u64 BE
0x20080	4	ChunkModeActive	u32 BE
0x20084	4	ChunkSelector	u32 BE
0x20088	4	ChunkEnable	u32 BE
0x200a0	4	EventSelector	u32 BE
0x200a4	4	EventNotification (per selector)	u32 BE
0x200a8	4	UserSetSelector	u32 BE
0x200ac	4	UserSetLoad (command, pValue)	u32 BE
0x20100	4	WidthMin (RO)	u32 BE
0x20104	4	WidthMax (RO)	u32 BE
0x20108	4	HeightMin (RO)	u32 BE
0x2010c	4	HeightMax (RO)	u32 BE
0x20110	8	ChunkTimestamp_Val (RO)	u64 LE
0x20118	4	ChunkWidth_Val (RO)	u32 LE
0x20200	32	DeviceModelName (RO)	string
0x20220	32	DeviceVendorName (RO)	string
0x20240	16	DeviceSerialNumber (RO)	string
0x20260	32	DeviceFirmwareVersion (RO)	string
0x20280	32	DeviceID (RO)	string

Structs

RegisterMap

Pre-populated register store for the fake camera.

Constants

CCP

CHUNK_TIMESTAMP_TICKS

Value latched into REG_CHUNK_TIMESTAMP_LE. Chosen so that reading it in the wrong byte order yields a plausible positive number (0x7856_3412_0000_0000) rather than an error — a byte-order defect that announces itself is not the one that shipped.

CHUNK_WIDTH_PX

Value latched into REG_CHUNK_WIDTH_LE. Most of the 311 are 4 bytes wide, so the common width gets its own node.

CURRENT_DEFAULT_GATEWAY

CURRENT_IP_ADDRESS

CURRENT_IP_CONFIG

CURRENT_SUBNET_MASK

DEFAULT_EXPOSURE_US

REG_USER_SET_SELECTOR and REG_USER_SET_LOAD back the SFNC user-set features, so the fake can answer the workflow issue #121 was filed about.

DEVICE_MAC_HIGH

Top two MAC bytes, right-aligned in the 32-bit register.

DEVICE_MAC_LOW

Bottom four MAC bytes.

DEVICE_MODE

DEVICE_MODE_VALUE

DeviceMode: big-endian (bit 31), character set 1 (UTF-8), class Transmitter (0).

FAKE_XML

GenApi XML describing a realistic fake camera following SFNC conventions.

FIRST_URL_REG

First XML URL register address and length.

HEARTBEAT_TIMEOUT

MESSAGE_CHANNEL_ADDRESS

Message channel destination address (GevMCDA).

MESSAGE_CHANNEL_PORT

Message channel destination port (GevMCP), port in the low 16 bits.

NUMBER_OF_MESSAGE_CHANNELS

GevNumberOfMessageChannels — the fake implements one.

NUMBER_OF_STREAM_CHANNELS

GevNumberOfStreamChannels — the fake implements one.

PERSISTENT_DEFAULT_GATEWAY

PERSISTENT_IP_ADDRESS

PERSISTENT_SUBNET_MASK

PTP_OFFSET_NS

Value latched into REG_PTP_OFFSET_LATCHED: the slave leading the master by 1 234 567 ns. Stored as the two’s-complement bit pattern a camera would put on the wire, so the test asserts the bytes and the decoded value separately rather than round-tripping through our own codec.

REG_ACQ_FRAME_RATE

REG_ACQ_FRAME_RATE_ENABLE

Predicate-gating registers driving realistic feature behaviour.

REG_ACQ_MODE

Acquisition registers.

REG_ACQ_START

REG_ACQ_STOP

REG_BLACK_LEVEL

REG_CHUNK_ENABLE

REG_CHUNK_MODE_ACTIVE

Chunk data registers.

REG_CHUNK_SELECTOR

REG_CHUNK_TIMESTAMP_LE

Chunk value registers, declared little-endian exactly as FLIR, Point Grey and Hikrobot declare theirs. 311 plain <IntReg> declarations across 16 of the 38 corpus documents are of this shape; before GA-28 every one of them decoded byte-swapped, and nothing in the tree could notice.

REG_CHUNK_WIDTH_LE

REG_DEVICE_CAPS

Device capability inquiry bits, exposed through a <StructReg> whose address is <pAddress> (a base node) plus a fixed <Address> offset — the shape Point Grey, FLIR and Hikrobot use for their inquiry blocks.

REG_DEVICE_FIRMWARE_VERSION

REG_DEVICE_ID

REG_DEVICE_MODEL_NAME

Device info string registers.

REG_DEVICE_SERIAL_NUMBER

REG_DEVICE_VENDOR_NAME

REG_EVENT_NOTIFICATION

EventNotification backing register for the selected event (0 = Off, 1 = On).

REG_EVENT_SELECTOR

REG_EXPOSURE_AUTO

REG_EXPOSURE_TIME

Analog control registers.

REG_FEATURE_STATUS

EventSelector backing register: a GigE Vision event identifier. REG_FEATURE_STATUS is a FLIR-shaped feature-status word: one big-endian register whose individual bits say whether a feature is implemented, available and locked, addressed by <MaskedIntReg> + <Bit>.

REG_GAIN

REG_GAIN_AUTO

REG_HEIGHT

REG_HEIGHT_MAX

REG_HEIGHT_MIN

REG_OFFSET_X

REG_OFFSET_Y

REG_PIXEL_FORMAT

REG_PTP_OFFSET_LATCHED

A PTP offset-from-master, copied in shape from the FLIR BFS-PGE-31S4C-C description in the corpus (<Length>8</Length>, <Sign>Unsigned</Sign>, <Endianess>BigEndian</Endianess>). It is the node issue #140 was filed against, and it is declared unsigned although a clock offset is signed by nature — so its top bit is set whenever the slave leads the master. That combination is what made the node unreadable.

REG_SENSOR_HEIGHT

REG_SENSOR_TYPE

REG_SENSOR_WIDTH

REG_STREAM_CHANNEL_SELECTOR

Which stream channel the GevSCP* features address.

REG_TIMESTAMP_FREQ

Timestamp registers.

REG_TIMESTAMP_LATCH

REG_TIMESTAMP_VALUE

REG_USER_SET_LOAD

See REG_USER_SET_SELECTOR.

REG_USER_SET_SELECTOR

REG_WIDTH

Image format registers.

REG_WIDTH_MAX

REG_WIDTH_MIN

Limit registers.

SCPS_DO_NOT_FRAGMENT

GevSCPSPacketSize bit 30: set do-not-fragment on transmitted packets.

SCPS_FIRE_TEST_PACKET

GevSCPSPacketSize bit 31: send one test packet of the requested size.

SCP_DEST_ADDR

SCP_HOST_PORT

SCP_PACKET_DELAY

SCP_PACKET_SIZE

STREAM_CHANNEL_BASE

STREAM_CHANNEL_STRIDE

Address stride between GigE Vision stream channel register blocks.

STREAM_PACKET_SIZE_MASK

The bits of GevSCPSPacketSize that hold the size itself.

SUPPORTED_IP_CONFIG

URL_REG_LEN

VERSION

Bootstrap register addresses (GigE Vision specification).

XML_BLOB_BASE

Address where the actual XML blob is stored in the register space.